Latest semiconductor industry news and analysis
Page 10 of 34Simulation: Reality is in the interaction. The post The system architect’s sketchbook: Inside the simulation appeared first on EDN.
The EXPRESS program, a five-year, £10.4m UK Engineering and Physical Sciences Research Council (EPSRC)-funded project led by the University of Warwick and University of Southampton, is to support the development of next-generation transistor and optoelectronic devices...
5G covers under 40% of landmass. This Whitepaper details how 3GPP Release 17 addresses six satellite challenges: delay, Doppler, path loss, polarization, spectrum, and architecture.What Attendees will LearnWhy non-terrestrial networks are now integral to the 5G roadmap — Understand how the Third Generation Partnership Project (3GPP) Release 17 incorporates satellite-based...
As Brussels sharpens its de-risking agenda, analysts warn that the real test of Europe’s chip ambitions may come from market economics, not geopolitics. The post Europe’s Semiconductor Strategy Meets Market Reality appeared first on EE Times.
Scaling logic continues to deliver better performance per watt, but it's becoming harder, more expensive, and increasingly customized. The post Challenges In Scaling Chips To 2nm And Below appeared first on Semiconductor Engineering.
Any software that claims to be independent from hardware is inefficient, bloated software. The time for such software development is over. The post All Software Is Hardware-Dependent appeared first on Semiconductor Engineering.
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The Sensors Converge Conference is one of the premier technical gatherings dedicated to the design, integration, and deployment of sensing technologies across industries. The event brings together engineers, system architects, researchers, and product developers to explore advancements in sensor hardware, edge computing,… Read More The post Sensors Converge: Where Intelligence...
The Semiconductor Newsletter
Learn how using a phase/frequency detector (PFD) in place of a phase detector improves the acquisition range of a PLL.
Original Article By SemiVision Research [Reading time: 12 mins]
Nvidia Vera, Arm AGI CPU, Meta, x86, more
A new technical paper, “Quantifying Uncertainty in FMEDA Safety Metrics: An Error Propagation Approach for Enhanced ASIC Verification,” was published by Robert Bosch GmbH. Abstract “Accurate and reliable safety metrics are paramount for functional safety verification of ASICs in automotive systems. Traditional FMEDA (Failure Modes, Effects, and Diagnostic Analysis) metrics,...
A new technical paper, “SoK: From Silicon to Netlist and Beyond Two Decades of Hardware Reverse Engineering Research,” was published by the Ruhr University Bochum and the Max Planck Institute for Security and Privacy. Abstract “As hardware serves as the root of trust in modern computing systems, Hardware Reverse Engineering...
A new technical paper, “Characterizing CPU-Induced Slowdowns in Multi-GPU LLM Inference,” was published by the Georgia Institute of Technology. Abstract “Large-scale machine learning workloads increasingly rely on multi-GPU systems, yet their performance is often limited by an overlooked component: the CPU. Through a detailed study of modern large language model...
At the shows, Nordic debuted new cellular platforms, entry-level Bluetooth LE SoCs, and an edge-AI-enabled wireless chip.
In a landmark case, a jury found this week that Meta and YouTube negligently designed their platforms and harmed the plaintiff, a 20-year-old woman referred to as Kaley G.M. The jury agreed with the plaintiff that social media is addictive and harmful and was deliberately designed to be that way....
In today’s technological landscape, the only constant is the rate of obsolescence. As engineers move deeper into the eras of 6G, ubiquitous artificial intelligence, and hyper-miniaturized electronics, a traditional degree is only a starting point.To remain competitive in today’s job market, technical specialists must evolve into future-ready professionals by cultivating...
Why copper grain size matters for hybrid bonding and how to control it for HBM and chiplets. Read the article here. Abstract Hybrid bonding is reshaping advanced packaging by enabling ultra-fine pitch copper-to-copper interconnects, essential for high-bandwidth memory (HBM), chiplet integration, and 3D heterogeneous systems. While alignment precision, oxide control,...
The South Korean fabless startup reports accelerating global adoption of its DX-M1 AI chip across eight countries and seven application domains — and is now using Embedded World 2026 as the launchpad for its European commercial push. The post DEEPX Sets New Pace in Physical AI Commercialization—27 Global Deals in...