Central Processing Unit – the primary general-purpose processor in a computer, executing program instructions and managing tasks.
41 articles
Telecom operators are updating 5G infrastructure with AI and preparing for 6G. The post At MWC, Intel Outlines CPU-Driven Case for Telecom Networks appeared first on EE Times.
Introduced in 1974, the TMS1000 family combined CPU, ROM, RAM, and I/O on a single die and established the commercial template for the microcontroller.
Geopolitics and the battle between GPUs and CPUs is defining the future of 6G and telco economics. The post MWC 2026 Concludes as Telcos Pivot to AI appeared first on EE Times.
The i.MX 93W applications processor from NXP combines a dedicated AI NPU with secure tri-radio wireless connectivity in a single package. The post Edge AI SoC integrates tri-radio appeared first on EDN.
Qualcomm’s AI-native Wi-Fi 8 platforms, R19-ready 5G modems, and custom Oryon CPUs set the company up for the next generation of mobile and networking infrastructure.
As AI systems scale from single-rack scale-up network systems to multi-rack configurations up to thousands of AI processors, copper interconnects have reached their limits in speed, density and reach. Future scale-up networks require an optical architecture that delivers higher bandwidth density at lower power with maximum processor utilization...
First applications processor to combine an AI NPU with secure, tri-radio connectivity, replacing up to 60 discrete components with a single package Accelerates coordinated AI agent deployment with integrated edge compute and secure connectivity, supported by NXP software and eIQ® AI enablement Pre-certified designs simplify wireless certification, eliminating RF complexity...
Strategic focus on custom silicon allows operators to manage 5G costs preparing for 6G and AI-driven data surge. The post Arm Positions Neoverse for AI and Telco Networks at MWC appeared first on EE Times.
SummaryFully homomorphic encryption (FHE) allows computing on encrypted data without decryption, but it’s currently slow on standard CPUs and GPUs.Intel’s Heracles chip accelerates FHE tasks up to 5,000 times faster than top Intel server CPUs.Heracles uses a 3-nanometer FinFET technology and high-bandwidth memory, enabling efficient encrypted computing at scale.Startups and...
Announced today at Embedded World, the new Core Series 2 may accelerate the industrial edge and real-time applications, while the healthcare suite may help providers meet the challenges of patient care using edge AI.
NVIDIA today announced the NVIDIA Vera Rubin platform is opening the next frontier of agentic AI, with seven new chips now in full production. They are: the NVIDIA Vera CPU, ... The post Nvidia announces seven Vera Rubin chips in volume production appeared first on Electronics Weekly.
Six months after acquiring Arduino, Qualcomm goes big by adding the Dragonwing IQ-8275 AI processor to Arduino's platform.
Jensen Huang was crowned 'The Inference King' with Groq-powered Rubin CPUs, unveiling dramatic architectural leaps at GTC this year. The post GTC 2026 Keynote: Long Live the Inference King appeared first on EE Times.
My podcast guest this week is Ferric CEO Noah Sturcken. Noah and I discuss how Ferric’s innovations—specifically their ferromagnetic materials and on-chip power converters—are addressing the critical power, efficiency, and integration hurdles facing today’s AI processors. We also explore how IVRs enable higher instantaneous power delivery, simplify board design, and...
HBM4 deal; war's impact on supply chain; U.S. AI framework; GPU smuggling; restart of H200 processors for China; SK hynix's memory prediction; TFLN photonics deal; test and metrology platforms; NoC verification automation; Tesla probe; AI distillation attacks. The post Chip Industry Week In Review appeared first on Semiconductor Engineering.
German startup Q.ANT reaches full production capacity as demand surges for energy-efficient photonic AI processors. The post Q.ANT Hits Full Production Capacity for Photonic AI Processors appeared first on EE Times.
Happy 80th anniversary, ENIAC! The Electronic Numerical Integrator and Computer, the first large-scale, general-purpose, programmable electronic digital computer, helped shape our world.On 15 February 1946, ENIAC—developed in the Moore School of Electrical Engineering at the University of Pennsylvania, in Philadelphia—was publicly demonstrated for the first time. Although primitive by today’s...
Analyzing the CPU, GPU, and LPU chip ratios unveiled at the Nvidia GTC keynote, the impact of the Groq LPX chip on disaggregated decoding, and its potential for speculative decoding in AI inference
NXP claims that this device represents the first time an applications processor has combined a dedicated AI NPU with tri-radio wireless connectivity.
Scale up, CPUs, Groq, tiered inference economics, SaaS is not dead
This is a sponsored article brought to you by PNY Technologies.In today’s data-driven world, data scientists face mounting challenges in preparing, scaling, and processing massive datasets. Traditional CPU-based systems are no longer sufficient to meet the demands of modern AI and analytics workflows. NVIDIA RTX PROTM 6000 Blackwell Workstation Edition...
Oxford, UK, March 31st, 2026: EnSilica, a leading maker of mixed-signal ASICs, has been selected to join the newly formed CHERI Adoption Collective, launched by PA Consulting in collaboration with the UK Department for Science, Innovation & Technology (DSIT). CHERI (Capability Hardware Enhanced RISC Instructions) is a processor technology that...
Edge, in-sensor AI processors; TMDC-based transistors; DRAM read disturbance threshold; replay-based validation for chiplets; LLM-specific algorithmic attacks; noise in tellurium transistors; FMEDA safety metrics; HW reverse engineering; slowdowns in multi-GPU LLM inference. The post Chip Industry Technical Paper Roundup: Mar. 31 appeared first on Semiconductor Engineering.
The SAM9X75D5M from Microchip is a hybrid SiP integrating an 800-MHz ARM926EJ-S 32-bit processor with 512 Mbits of DDR2 SDRAM. The post Automotive HMI SiP packs MPU and DDR2 memory appeared first on EDN.
Nvidia Vera, Arm AGI CPU, Meta, x86, more
A new technical paper, “Characterizing CPU-Induced Slowdowns in Multi-GPU LLM Inference,” was published by the Georgia Institute of Technology. Abstract “Large-scale machine learning workloads increasingly rely on multi-GPU systems, yet their performance is often limited by an overlooked component: the CPU. Through a detailed study of modern large language model...
What's your Weissman score?
Arm unleashes its first silicon AGI CPU to power agentic AI in data centers, challenging x86 rivals. The post Arm Launches First Silicon CPU, Targets Data Center Agentic AI Workloads appeared first on EE Times.
The MAI device from Dimension NXG runs AI models continuously on a 180-mAh battery for up to 14 days, using analog in-memory compute to keep power consumption at microwatt levels.
When you hear the term humanoid robot, you may think of C-3PO, the human-cyborg-relations android from Star Wars. C-3PO was designed to assist humans in communicating with robots and alien species. The droid, which first appeared on screen in 1977, joined the characters on their adventures, walking, talking, and interacting...
News highlights Cambridge, England – Mar. 24, 2026 – Arm Holdings plc (NASDAQ: ARM) today announced the next evolution of the Arm compute platform, extending into production silicon products for the first time in the company’s history. This begins with the launch of the Arm AGI CPU, an Arm-designed CPU for AI data centers,...
Last week’s Nvidia GTC conference highlighted new chip architectures to power AI. But as the chips become faster and more powerful, the remainder of data center infrastructure is playing catch-up. The power-delivery community is responding: Announcements from Delta, Eaton, and Vertiv showcased new designs for the AI era. Complex and...
The undying thirst for smarter (historically, that means larger) AI models and greater adoption of the ones we already have has led to an explosion in data-center construction projects, unparalleled both in number and scale. Chief among them is Meta’s planned 5-gigawatt data center in Louisiana, called Hyperion, announced in...
WHEN KYIV-BORN ENGINEER Yaroslav Azhnyuk thinks about the future, his mind conjures up dystopian images. He talks about “swarms of autonomous drones carrying other autonomous drones to protect them against autonomous drones, which are trying to intercept them, controlled by AI agents overseen by a human general somewhere.” He also...
Disagg is out of the bag. What it means for Nvidia, CPUs, XPUs, startups, and more.
Infineon’s TDM24745T quad-phase power module with TLVR magnetics provides high current density for AI workloads. The post TLVR power module supplies 320 A for AI processors appeared first on EDN.
Alibaba is directly challenging global chip leaders by leveraging open-standard architecture to redefine the AI hardware landscape. The post Alibaba Launches XuanTie C950 CPU for Agentic AI appeared first on EE Times.
Arm’s new AGI CPU signals a bold move into the $100B AI silicon market, balancing high-performance orchestration for agentic AI. The post AGI CPU: Arm’s $100B AI Silicon Tightrope Walk Without Undermining Its Licensees appeared first on EE Times.
Phoenix, AZ – March 31, 2026. DDC-I, a leading supplier of software and professional services for mission- and safety-critical applications, today announced the availability of its Deos™ multi-core real-time operating system for the NXP S32G family of network application processors with verification evidence to DO-178C Design Assurance Level A (DAL...
In a landmark moment in its 35-year history, Arm has debuted its own silicon product, the AGI CPU, built on the Arm Neoverse platform.