AI & Machine Learning

Chips designed for Artificial Intelligence workloads – ranging from AI accelerators in data centers to edge AI chips. This includes GPUs and TPUs in training servers, inference accelerators (ASICs like Google TPU, Intel Habana, etc.), and AI SoCs in mobile and IoT. AI chips are optimized for parallel matrix operations and often use lower-precision arithmetic to achieve high performance on neural network tasks.

229 articles

EE Journal

Keysight Demonstrates 5G-Advanced AI-Powered Channel State Information Compression and Paves the Way for 6G

Mar 06, 2026

SANTA ROSA, Calif.–(BUSINESS WIRE)–Keysight Technologies, Inc. (NYSE: KEYS) has collaborated with Qualcomm Technologies, Inc. to demonstrate machine learning (ML)-based Channel State Information (CSI) compression to enhance link adaptation efficiency in advanced Multiple-Input Multiple-Output (MIMO) systems at Mobile World Congress (MWC) Barcelona 2026. In a controlled lab validation, the ML-based CSI feedback...

EE Journal

Plug-and-Play GMSL Camera Adapters Turn NVIDIA Jetson Orin Dev Kits into Rugged Multi-Camera Vision Platforms

Mar 06, 2026

Hsinchu, Taiwan, March 5th, 2026 – oToBrite, a provider of Vision AI solutions for unmanned vehicles, off-highway machines, and robotics, today announced two plug-and-play GMSL2 camera enablement kits for NVIDIA Jetson Orin Nano and NVIDIA Jetson AGX Orin developer kits. Each kit combines a rugged oToBrite GMSL2 camera adapter built around an ADI/MAXIM MAX96724 deserializer with the corresponding NVIDIA Jetson developer kit in...

Semiconductor Engineering

Optimizing In-Memory AI Accelerators Across Multiple Workloads (KAUST, Compumacy)

Mar 07, 2026

Researchers from KAUST and Compumacy for Artificial Intelligence Solutions have released “Joint Hardware-Workload Co-Optimization for In-Memory Computing Accelerators”. Abstract “Software-hardware co-design is essential for optimizing in-memory computing (IMC) hardware accelerators for neural networks. However, most existing optimization frameworks target a single workload, leading to highly specialized hardware designs that do not...

Semiconductor Today

CEA-Leti and NcodiN partner to industrialize 300mm silicon photonics for bandwidth-hungry AI interconnects

Mar 12, 2026

Micro/nanotechnology R&D center CEA-Leti of Grenoble, France and NcodiN of Palaiseau, Paris, France (which was founded in 2023 to pioneer optical interconnects with integrated nanolasers for next-generation computing) have announced a strategic collaboration to industrialize NcodiN’s optical interposer technology on a 300mm integrated photonics process...

EE Journal

Salience Labs Launches Industry’s Highest Performing 32-Port All-Optical Silicon Photonic Switch to Transform the Networking Layer of AI Datacenter Infrastructure Share

Mar 12, 2026

OXFORD, England-March 10, 2026-Salience Labs Limited, a leader in photonic solutions targeting connectivity for AI datacenter infrastructure, today announced the availability of the industry’s highest performing all-optical 32-port switch. Designed to unlock peak performance in AI datacenters, Salience Labs’ all-optical switch technology improves network latency, throughput and reliability metrics while...

3D InCites

Applied Materials and SK hynix Announce Long-Term R&D Partnership to Accelerate AI Memory Innovation at EPIC Center in Silicon Valley

Mar 11, 2026

March 10, 2026– Joint R&D programs focused on advancing materials engineering and advanced packaging innovations for next-generation DRAM and high-bandwidth memory (HBM)– Opening this year, Applied’s EPIC Center is designed to provide chipmakers and ecosystem partners with earlier access to Applied’s R&D portfolio, faster cycles of learning and accelerated transfer...

EE Journal

NXP’s New i.MX 93W Fuses Edge Compute and Secure Wireless Connectivity to Accelerate Physical AI

Mar 11, 2026

First applications processor to combine an AI NPU with secure, tri-radio connectivity, replacing up to 60 discrete components with a single package Accelerates coordinated AI agent deployment with integrated edge compute and secure connectivity, supported by NXP software and eIQ® AI enablement Pre-certified designs simplify wireless certification, eliminating RF complexity...

EE Journal

Axelera® AI Adds Kudelski Labs’ Security IP to Europa Chip to Enable Secure, High-Performance Edge AI

Mar 11, 2026

CHESEAUX-SUR-LAUSANNE, Switzerland, and PHOENIX (AZ), USA — March 10, 2026 — Kudelski Labs, the innovation arm of the Kudelski Group (SIX:KUD.S) and a global leader in embedded security for semiconductors and connected devices, today announced that Axelera AI has integrated the Kudelski Secure Enclave, robust to AVA_VAN.3 (“KSE3”) into Europa, its new high-performance, Edge AI processing platform. The collaboration strengthens the security foundation of Europa, ensuring that...

Semiconductor Today

Sivers to supply lasers and optical amplifiers worth $53–138m over customer’s product life-cycle

Mar 11, 2026

Sivers Semiconductors AB of Kista, Sweden (which supplies RF beam-former ICs and lasers for AI data-center, SATCOM, defense and telecom applications) says that its strategic LiDAR (light detection and ranging) customer has incorporated its technology across their platforms and will ramp production from fourth-quarter 2026 for automotive and industrial applications....

IEEE Spectrum Semiconductors

Exploring Light and Life: Nanophotonics and AI for Molecular Sequencing and Single-Cell Phenotyping

Mar 16, 2026

The biosphere transmits data 9 orders of magnitude faster than the technosphere. A new class of nanophotonic tools is beginning to close that gap.In this webinar, Prof. Dionne will present VINPix: Si-photonic resonators with high-Q factors (thousands to millions), subwavelength mode volumes, and densities exceeding 10M/cm². Combined with acoustic bioprinting...

EE Journal

Siemens launches Fuse EDA AI Agent for automation across semiconductor, 3D IC and PCB system workflows

Mar 17, 2026

Fuse EDA AI Agent autonomously orchestrates multi-agent workflows across Siemens’ complete electronic design automation (EDA) portfolio, from design conception through manufacturing sign-off, increasing engineering efficiency and design quality Builds on top of the Fuse EDA AI system, which provides an advanced retrieval-augmented generation (RAG) framework, multimodal EDA data support, secure...

Semiconductor Engineering

Systematic Training and Validation of AI-based Systems With Digital Twins and Scenario Engineering

Mar 17, 2026

A new technical paper, “Towards Structured Training and Validation of AI-based Systems with Digital Twin Scenarios,” was published by researchers at RWTH Aachen University and RIF e.V. Abstract “Artificial intelligence (AI) has emerged as a pivotal technology for autonomous systems across various domains, but quality assurance remains challenging due to...

Semiconductor Engineering

How SW and HW Vulnerabilities Can Complement LLM-Specific Algorithmic Attacks (UT Austin, Intel et al.)

Mar 21, 2026

A new technical paper, “Cascade: Composing Software-Hardware Attack Gadgets for Adversarial Threat Amplification in Compound AI Systems,” was published by the University of Texas, Austin, Intel Labs, Symmetry Systems, Microsoft and Georgia Tech. Abstract “Rapid progress in generative AI has given rise to Compound AI systems – pipelines comprised of...

Semiconductor Today

OpenLight receives first volume production orders Tower’s PH18DA InP-on-silicon photonic platform

Mar 20, 2026

Photonic application-specific integrated circuit (PASIC) chip designer and manufacturer OpenLight of Goleta, near Santa Barbara, CA, USA (which launched as an independent company in June 2022, introducing the first open silicon photonics platform with heterogeneously integrated III-V lasers, modulators, amplifiers and detectors) has announced the first volume production orders by...

EE Journal

Marvell Launches Industry’s First 260-lane PCIe 6.0 Switch for AI Data Center Scale-up Infrastructure

Mar 20, 2026

Marvell Technology, Inc. (NASDAQ: MRVL), a leader in data infrastructure semiconductor solutions, today announced Marvell® Structera™ S 60260, the industry’s first 260-lane PCIe 6.0 switch. Leveraging industry-leading interconnect solutions through the recent acquisition of XConn Technologies, the new industry’s highest-radix PCIe switch extends the Marvell end-to-end PCIe portfolio, offering unique...

EE Journal

Qnity Collaborates with NVIDIA to Accelerate Innovation for Semiconductor and Advanced Electronics Materials

Mar 20, 2026

WILMINGTON, Del.–(BUSINESS WIRE)–Qnity Electronics, Inc. (“Qnity”) (NYSE: Q), a premier technology solutions leader across the semiconductor value chain, today announced a collaboration with NVIDIA to accelerate AI-driven innovation using open NVIDIA Nemotron 3 Nano, ALCHEMI BMD NIM, LAMMPS Kokkos, and CUDA-X accelerated Abaqus for modeling and simulation technologies. The collaboration...

EE Journal

Infineon accelerates deployment of robots with improved safety and security features using digital twins in collaboration with NVIDIA

Mar 20, 2026

Infineon to accelerate next-generation humanoid robots enabled by digital twins in collaboration with NVIDIA Scalable deployment of humanoid robots through reference designs integrating Infineon smart actuators with NVIDIA Jetson Thor and NVIDIA Halos AI Systems Inspection Lab to advance safety and security for robots Infineon enables the key functional blocks...

IEEE Spectrum Semiconductors

ENIAC, the First General-Purpose Digital Computer, Turns 80

Mar 19, 2026

Happy 80th anniversary, ENIAC! The Electronic Numerical Integrator and Computer, the first large-scale, general-purpose, programmable electronic digital computer, helped shape our world.On 15 February 1946, ENIAC—developed in the Moore School of Electrical Engineering at the University of Pennsylvania, in Philadelphia—was publicly demonstrated for the first time. Although primitive by today’s...

Semiconductor Today

OpenLight showcases III-V heterogenous integrated silicon photonics innovations and production capabilities

Mar 23, 2026

At the Optical Fiber Communication Conference and Exhibition (OFC 2026) in Los Angeles (15–19 March), photonic application-specific integrated circuit (PASIC) chip designer and manufacturer OpenLight of Goleta, Santa Barbara, CA, USA (which launched as an independent company in June 2022, introducing the first open silicon photonics platform with heterogeneously integrated...

Semiconductor Engineering

Why Co-Packaged Optics Should be Viewed as an Architectural Commitment (UW-Madison, MIT et al.)

Mar 31, 2026

A new technical paper, “3D optoelectronics and co-packaged optics: when solving the wrong problems stalls deployment,” by the University of Wisconsin, MIT, and Invictus Innovation EV Technology. Abstract “The rapid growth of AI and accelerator-driven workloads is forcing a fundamental rethinking of optical interconnect architectures in datacenters. Co-packaged optics and...

EE Journal

QSMP-20 module utilises DDR3 memory to avoid ongoing AI pressure on lead times and cost

Mar 30, 2026

Oxfordshire, UK, March 2026: Direct Insight, the UK-based technical systems integrator focused on system-on-module solutions, can now deliver and support development for the new QSMP-20 solder-down QFN-style SoM (system-on-module), providing a drop-in, pin-compatible upgrade for the QSMP-15 that now features an industrial-grade STM32MP2 MPU. The QSMP-20 also takes advantage of lower cost DDR3 RAM with shorter...

Semiconductor Engineering

Systematic Analysis of CPU-Induced Slowdowns in Multi-GPU LLM Inference (Georgia Tech)

Mar 28, 2026

A new technical paper, “Characterizing CPU-Induced Slowdowns in Multi-GPU LLM Inference,” was published by the Georgia Institute of Technology. Abstract “Large-scale machine learning workloads increasingly rely on multi-GPU systems, yet their performance is often limited by an overlooked component: the CPU. Through a detailed study of modern large language model...

Semiconductor Today

Infineon and DG Matrix partner to drive solid-state transformer technology for AI data centers and industrial power applications

Mar 25, 2026

Infineon Technologies AG of Munich, Germany and solid-state transformer (SST) solutions firm DG Matrix are partnering to enhance the efficiency of power conversion required to connect AI data centers and industrial power applications to the public grid. As part of the collaboration, DG Matrix will source latest-generation silicon carbide (SiC)...

Semiconductor Today

Renesas unveils first bidirectional 650V-class GaN switch for solar power inverters, AI data centers and onboard EV chargers

Mar 24, 2026

Renesas Electronics Corp of Tokyo, Japan has introduced what is claimed to be the industry’s first bidirectional switch using depletion-mode (d-mode) GaN technology, capable of blocking both positive and negative currents in a single device with integrated DC blocking. Targeting single-stage solar micro-inverters, AI data centers and onboard electric vehicle...

3D InCites

Packaging the Future of AI – Key Themes from the IMAPS Device Packaging Conference

Mar 24, 2026

This year’s annual International Microelectronics Assembly and Packaging Society (IMAPS) Device Packaging Conference (DPC) in Arizona was bursting with excitement and acted as a platform for the industry’s brightest engineers, researchers, suppliers, and students from across the microelectronics packaging ecosystem to come together to share innovations shaping next-generation computing systems.  With record...

Semiconductor Today

onsemi’s hybrid power integrated modules used in Sineng Electric’s solar and energy storage solutions

Apr 02, 2026

Intelligent power and sensing technology firm onsemi of Scottsdale, AZ, USA says that its hybrid power integrated modules (PIMs) will be featured in Sineng Electric’s next-generation 430kW liquid-cooled string energy storage systems (ESS) and 320kW utility-scale solar inverter. The design win builds upon the long-standing collaboration between onsemi and Sineng...

Semiconductor Engineering

Automated Security Assertion Generation Using LLMs (U. of Florida)

Apr 03, 2026

A new technical paper, “Assertain: Automated Security Assertion Generation Using Large Language Models,” was published by University of Florida. Abstract “The increasing complexity of modern system-on-chip designs amplifies hardware security risks and makes manual security property specification a major bottleneck in formal property verification. This paper presents Assertain, an automated...