← All Topics

DRAM

Dynamic Random-Access Memory – a common type of volatile memory chip that stores each bit in a capacitor, used as main memory in computers (requires periodic refresh of data). Provides fast, temporary data storage for system operation.

7 articles

3D InCites

Applied Materials and SK hynix Announce Long-Term R&D Partnership to Accelerate AI Memory Innovation at EPIC Center in Silicon Valley

Mar 11, 2026

March 10, 2026– Joint R&D programs focused on advancing materials engineering and advanced packaging innovations for next-generation DRAM and high-bandwidth memory (HBM)– Opening this year, Applied’s EPIC Center is designed to provide chipmakers and ecosystem partners with earlier access to Applied’s R&D portfolio, faster cycles of learning and accelerated transfer...

Semiconductor Engineering

3D DRAM with CBA Technology (Georgia Tech)

Mar 17, 2026

A new technical paper, “System-Technology Co-Optimization of Bitline Routing and Bonding Pathways in Monolithic 3D DRAM Architectures,” was published by researchers at Georgia Tech. Abstract “3D DRAM has emerged as a promising approach for continued density scaling, but its viability is limited by routing and hybrid bonding constraints to periphery,...

EDN

Scoping out the chiplet-based design flow

Mar 19, 2026

The chiplets design combines IP access, interposer expertise, and relationships with HBM suppliers, foundries and OSATs worldwide. The post Scoping out the chiplet-based design flow appeared first on EDN.

Semiconductor Engineering

Chip Industry Technical Paper Roundup: Mar. 31

Mar 31, 2026

Edge, in-sensor AI processors; TMDC-based transistors; DRAM read disturbance threshold; replay-based validation for chiplets; LLM-specific algorithmic attacks; noise in tellurium transistors; FMEDA safety metrics; HW reverse engineering; slowdowns in multi-GPU LLM inference. The post Chip Industry Technical Paper Roundup: Mar. 31 appeared first on Semiconductor Engineering.

3D InCites

Engineering Copper Grain Structure for High-Yield Hybrid Bonding in 3D Packaging

Mar 27, 2026

Why copper grain size matters for hybrid bonding and how to control it for HBM and chiplets. Read the article here. Abstract Hybrid bonding is reshaping advanced packaging by enabling ultra-fine pitch copper-to-copper interconnects, essential for high-bandwidth memory (HBM), chiplet integration, and 3D heterogeneous systems. While alignment precision, oxide control,...

IEEE Spectrum Semiconductors

What Will It Take to Build the World’s Largest Data Center?

Mar 24, 2026

The undying thirst for smarter (historically, that means larger) AI models and greater adoption of the ones we already have has led to an explosion in data-center construction projects, unparalleled both in number and scale. Chief among them is Meta’s planned 5-gigawatt data center in Louisiana, called Hyperion, announced in...

3 comments 0 comments

Semiconductor Engineering

AI Demand Resets Memory Market Priorities, Tightening NOR Flash Availability

Apr 02, 2026

A focus on DRAM and NAND is squeezing NOR wafer capacity and backend test resources. The post AI Demand Resets Memory Market Priorities, Tightening NOR Flash Availability appeared first on Semiconductor Engineering.

Browse

Hot Topics

DRAM

Applied Materials and SK hynix Announce Long-Term R&D Partnership to Accelerate AI Memory Innovation at EPIC Center in Silicon Valley

3D DRAM with CBA Technology (Georgia Tech)

Scoping out the chiplet-based design flow

Chip Industry Technical Paper Roundup: Mar. 31

Engineering Copper Grain Structure for High-Yield Hybrid Bonding in 3D Packaging

What Will It Take to Build the World’s Largest Data Center?

AI Demand Resets Memory Market Priorities, Tightening NOR Flash Availability