Penguin Solutions has announced that its SMART Modular CXL NV-CMM E3.S 2T non-volatile memory module has achieved CXL compliance. This milestone underscores the company's commitment to adhering to industry standards in advanced memory solutions.
The article discusses the importance of precision glass carrier inspection in identifying surface anomalies and defects in semiconductor manufacturing. This technology is particularly relevant for the AI and HPC markets, where performance and reliability are critical.
The article introduces LACIN, a new interconnection network that utilizes identically indexed ports to simplify the cabling and routing of complete graph implementations. This innovation aims to facilitate the deployment of networks for various scales of parallel computing, from VLSI systems to supercomputers.
The article introduces a new framework for a Memory-Guided Unified Hardware Accelerator designed for mixed-precision scientific computing, addressing limitations in existing hardware accelerators. It focuses on improving finite element methods, spiking neural networks, and FPGA tensor accelerators by integrating memory-guided adaptation.
The article discusses the transition of advanced AI models from cloud environments to local supercomputers, drawing parallels to the evolution of computing from minicomputers to mainframes. This shift highlights the growing capabilities and relevance of local computing power in handling complex AI tasks.
Researchers from TU Wien and other institutions have published a paper on a new type of transistor, the ultra-thin body SiGeSn transistor, designed to operate at cryogenic temperatures. These transistors are crucial for the efficient control and readout of qubits in quantum computing applications.
Cadence has unveiled an ecosystem at CES 2026 that offers pre-validated packaged chiplets aimed at physical AI, data centers, and high-performance computing. This collaboration includes notable partners such as Arm and Arteris.
The article discusses the lengthy R&D process required for new technologies, particularly quantum computers, which face significant engineering challenges compared to traditional electronic circuits. It highlights the historical context of technological development timelines, suggesting that advancements in quantum computing will take considerable time.
Silent Data Corruption (SDC) is a significant issue in semiconductor design, especially in high-performance computing settings like AI data centers. A recent presentation by Broadcom Inc. and Siemens EDA at the 2025 TSMC OIP event addressed this challenge and proposed solutions through in-system embedded deterministic testing.
Socionext has achieved two successful tape-outs of complex 3D-IC designs in just seven months, targeting AI and HPC applications. This rapid iteration showcases advancements in packaging, EDA tools, and collaboration within the foundry ecosystem.
Georgia Tech's new paper explores the effects of DRAM writes on DDR5-based systems, emphasizing the importance of buffering write requests to optimize performance. The study introduces a method called BARD, which aims to reduce write latency by leveraging bank-parallelism.
The article presents HYLU, a new hybrid parallel LU factorization solver aimed at efficiently addressing sparse linear systems on multi-core architectures. It demonstrates superior performance compared to Intel MKL PARDISO, particularly in the numerical factorization phase.
Researchers at KAIST and Chonnam National University have published a paper on a new electromechanical switch designed for power gating applications. This technology aims to address leakage power concerns in highly integrated semiconductor systems, particularly in the context of rising demands for AI and high-performance computing.
The article discusses the impact of liquid cooling technology on supercomputing, highlighting its ability to enhance performance while reducing heat output. This advancement exemplifies Jevons’ paradox within the supercomputing sector.
Infineon Technologies and Lenovo are enhancing their partnership to advance autonomous driving technologies. The collaboration focuses on high-performance computing platforms for software-defined vehicles, utilizing Lenovo's autonomous driving domain controller units.
Q.ANT has introduced its new NPU 2, which features advanced nonlinear optical processing capabilities. This innovation is expected to significantly enhance efficiency and performance for AI and high-performance computing (HPC) applications.
Nvidia's acquisition of the Slurm open-source project highlights the irony of controlling an open-source initiative. The article suggests that this move is part of Nvidia's broader strategy to consolidate its influence in the industry.
The article discusses the ongoing evolution of interposers in 2.5D packaging, highlighting the need for improved yields in bridges. Progress is being made in this area, indicating advancements in packaging technology.
The article discusses a new MLIR-based compiler toolchain that aims to resolve the 'two-language problem' in developing problem-specific accelerators by allowing kernels written in Julia to be compiled into SystemVerilog. This advancement is particularly relevant as the demand for high-performance computing continues to grow with the rise of Exascale computing.
The article discusses the popularity of Lustre and IBM's General Parallel File System (GPFS), now known as IBM Storage Scale, among HPC and AI organizations for their storage needs. It raises the question of how these systems can be effectively utilized in cloud environments.