The article discusses the advantages of Siemens Veloce proFPGA CS for FPGA-based prototyping projects. It highlights how users can leverage this solution to enhance performance in their designs.
The article discusses the increasing complexity of PCB design due to the rise of heterogeneous multi-die designs. It emphasizes the importance of advanced analysis in addressing these challenges while maintaining a focus on complete system integration.
Photon Design Ltd is showcasing its latest photonic simulation tools at the SPIE Photonics West 2026 event in San Francisco. The innovations include HAROLD (QD), MT-FIMMPROP, and EPIPPROP, which will also be featured in various academic and commercial presentations at the show.
OpenACM is introduced as the first open-source compiler designed for SRAM-based approximate Digital Compute-in-Memory (DCiM) architectures, addressing the challenges posed by the memory wall in data-intensive AI workloads. It enables designers to optimize energy consumption through accuracy-configurable multipliers, facilitating fine-grained accuracy-energy trade-offs.
The article discusses the limitations of existing embodied carbon footprint models in the semiconductor industry, which fail to incorporate uncertainties in the supply chain. It introduces CarbonClarity, a probabilistic framework that allows for better modeling of these uncertainties and their impact on emissions.
The article discusses the importance of selecting the right prototyping partner in the semiconductor industry, highlighting S2C's role in advanced FPGA-based SoC prototyping. The author expresses anticipation for an upcoming update from S2C at the DVCon event in March.
The article focuses on deriving design equations for a second-order Phase-Locked Loop (PLL) that incorporates a lag-lead filter by analyzing its Bode plots. This approach aims to enhance the understanding of PLL performance in various applications.
PLS Programmierbare Logik & Systeme has launched UDE® 2026, a new version of its Universal Debug Engine, which includes enhanced functions for debugging and trace analysis of microcontroller applications. This release was showcased at the embedded world 2026 event in Nuremberg.
The article discusses the growing challenge of verification in chip design, which now consumes up to 70% of the design cycle due to increasing complexity and a shortage of design verification engineers. It highlights the introduction of Bronco AI agents aimed at addressing these verification bottlenecks.
Engineers are now leveraging automation algorithms to optimize network-on-chip configurations, moving away from manual placements of components like switches and buffers. This shift enhances the design process for system-on-chip (SoC) interconnects, particularly for AI workloads.
Anglia Components is enhancing its New Product Introduction (NPI) program by ensuring that new products are available on its e-commerce platform within 48 hours of their release. This initiative aims to support design engineers with quicker access to the latest components.
The article discusses the increasing complexity of System-on-Chip (SoC) designs, which demand enhanced prototype capacity and efficiency. S2C aims to address these challenges with a high productivity toolchain for SoC bring-up.
Siemens has launched a new cloud-based digital twin software aimed at accelerating the development of software-defined vehicles (SDVs). This offering promises to significantly reduce setup times from months to just days.
The article emphasizes the importance of the Engineering Track at DAC 2026, where industry practitioners share practical insights and lessons. It highlights the value of real-world experiences in enhancing engineering practices within the semiconductor sector.
The article continues the discussion on audio equipment setups in office environments, focusing on the connections between devices. It aims to explore the integration of various audio sources and their relevance in a professional setting.
The article discusses how the integration of previously isolated components in modern system design is leading to the breakdown of traditional design abstractions. This shift necessitates a reevaluation of verification processes, positioning them as a critical discipline throughout the product lifecycle.
The article discusses the importance of signal integrity in modern chip design, particularly focusing on clock integrity and clock jitter. These factors are critical for ensuring reliable performance in advanced semiconductor devices.
The article discusses advancements in MIPI D-PHY and MIPI C-PHY technologies that enhance performance and flexibility for high-speed camera and display communication. These innovations are crucial for the next generation of devices requiring faster data transfer rates.
The article introduces a formal translation framework using relational Hoare logic for high-level synthesis (HLS) of hardware accelerators. This method aims to improve automatic optimizations in HLS by recognizing complex memory access patterns and enhancing data processing efficiency while maintaining program semantics.
The article discusses the role of digital twins in transforming the design processes of automotive semiconductors and systems. This innovation is paving the way for the development of software-defined vehicles.