The article discusses advancements in semiconductor technology showcased at IEDM 2025, including interconnects beyond copper, the introduction of 1,000 CFETs, and next-generation NAND from SK Hynix. It also highlights the potential of 2D materials in future applications.
Data sharing is increasingly recognized as essential for the development of advanced semiconductor technologies, particularly in complex device nodes and multi-die configurations. This trend highlights the growing importance of collaboration and secure data exchange in chip manufacturing.
The article discusses advancements in wafer-scale two-photon lithography and methods for detecting hidden defects using AFM combined with AI. These innovations could enhance semiconductor manufacturing processes significantly.
The article features a Q&A session with TSMC, where they discuss their upcoming strategic initiatives. This dialogue aims to shed light on TSMC's future direction in the semiconductor landscape.
The article introduces a new book titled 'Thinking With Machines - The Brave New World of AI' that explores the intersection of artificial intelligence and technology. It suggests that there is a plethora of literature available on AI, indicating growing interest in the subject.
TSMC's N2 technology positions the company to maintain a leadership role in advanced semiconductor nodes for the foreseeable future. Analysts predict that this will give TSMC a competitive edge over its rivals.
The article discusses the challenges associated with lithography in semiconductor manufacturing, focusing on key players like ASML and xLight. It highlights the economic implications of substrate choices in the lithography process.
The excerpt poetically describes the experience of witnessing electrical phenomena, particularly the movement of ions and electrons, evoking a sense of wonder and fear. It reflects on the transformative power of these particles as they escape confinement, symbolizing freedom and potential.
The article highlights significant advancements in semiconductor technology in 2025, including the development of nanosheet transistors and the commercialization of optical fiber links integrated into processor packages. Additionally, it mentions innovative cooling techniques using diamond within integrated circuits.
TSMC has commenced volume production of its 2nm (N2) technology in the fourth quarter of 2025, as scheduled. This new technology incorporates first-generation nanosheet transistors, promising significant performance improvements.
The article discusses the discrepancy between the voltage set at regulators and the actual voltage experienced by transistors. This highlights the importance of accurate voltage monitoring at the transistor level for optimal performance.
Primarius has introduced a wafer-level low-frequency noise characterization solution that enhances the acquisition of high-quality, reproducible noise data, crucial for advanced semiconductor nodes. The Primarius 981X family sets a new standard in low-frequency noise measurement metrology.
The article discusses the use of GPUs to accelerate computational lithography, which is essential for optimizing mask synthesis at advanced semiconductor nodes. This advancement aims to enhance the efficiency and effectiveness of design processes in leading-edge technology.
The article discusses strategies to minimize voltage loss and improve yield in advanced Gate-All-Around (GAA) chips by addressing edge placement errors and over-etch variations in backside power delivery networks. These improvements are critical for enhancing the performance and reliability of next-generation semiconductor devices.
NanoIC has released an updated version of its N2 Pathfinding Process Design Kit (P-PDK), which includes advanced SRAM memory macros. This update is part of a European initiative aimed at driving innovation in chip technologies beyond the 2nm process node.
Imec has showcased record performance in p-type field-effect transistors (p-FETs) utilizing monolayer tungsten diselenide (WSe2) channels, achieving an impressive Imax of 690µA/µm. The presentation occurred at the 71st IEEE International Electron Devices Meeting, highlighting advancements in fabrication techniques for source/drain contacts and gate stack integration.
TSMC reported a November revenue of $11.4 billion, reflecting a 24.5% year-over-year increase but a 6.5% decline from October's record revenue. The month-over-month decrease is interpreted as a market adjustment rather than a downturn.
The article discusses the importance of measuring and monitoring gate profiles, film thickness, and structural uniformity at the nanometer scale in semiconductor manufacturing. It highlights the role of Optical Critical Dimension (OCD) in the context of Gate-All-Around (GAA) logic and vertical gate DRAM process control.
The article discusses the mechanisms of radiation damage in semiconductor devices and explores methods to minimize radiation dose during X-ray inspections. This is crucial for maintaining the integrity and performance of electronic components.
ClockEdge emphasizes the critical role of clock networks in advanced semiconductor nodes, where timing precision can significantly impact performance and production timelines. The article highlights the challenges design teams face in managing these sensitive networks.