Process Node

Keysight Technologies is addressing the challenges of data silos in electronic design automation (EDA) through an upcoming webinar. The event aims to highlight the importance of transforming data into actionable insights as complexity in chip design increases with advancements like AI integration.

SemiWiki

Why chip design needs industrial-grade EDA AI

Nov 25, 2025

The article discusses the transformative impact of artificial intelligence (AI) on various industries, highlighting the need for industrial-grade AI solutions in chip design. It contrasts consumer-grade AI applications with the specialized requirements of semiconductor design tools.

Tom's Hardware

Rapidus to start construction on 1.4nm fab in 2027 — research and development on node to begin next year

Nov 25, 2025

Rapidus, a Japanese startup, has announced plans to construct a 1.4-nm semiconductor fabrication facility in Hokkaido, with construction set to begin in 2027. Research and development on this advanced process node will commence next year.

Semiconductor Engineering

Faster Bug Discovery And Coverage Closure

Nov 24, 2025

Efficient bug discovery and coverage closure are critical to ensure that design flaws do not make it to silicon production. This process is essential for maintaining product quality and reliability in semiconductor manufacturing.

Tom's Hardware

The Panther stalks: Intel’s Panther Lake CPUs set to take off in Oregon, company reveals, and cutting-edge 18A process is on track

Nov 21, 2025

Intel's Panther Lake CPUs are progressing well with their 18A process, although yields remain low. However, the company is expected to achieve industry-standard yields by early 2027.

r/chipdesign

How to layout correctly ?

Nov 20, 2025

The article discusses layout considerations for designing a Low Dropout Regulator (LDO), focusing on the importance of dummy structures in relation to transistor gates. It raises questions about the merging of contacts and the impact of size reduction on layout efficiency.

Tom's Hardware

Microsoft unveils Azure Cobalt 200 CPU, in-house chip targets higher performance and deeper integration — Arm-based chip is equipped with 132 cores and manufactured using TSMC's 3nm process

Nov 20, 2025

Microsoft has introduced the Azure Cobalt 200, a new in-house server processor featuring 132 cores and based on Arm architecture. This CPU is manufactured using TSMC's cutting-edge 3nm process technology.

Chipstrat

Intel is "All In On 14A"

Nov 19, 2025

Intel's commitment to its 14A process node was highlighted during the RBC TIMT conference. This indicates a strategic focus on advancing their manufacturing capabilities.

r/chipdesign

What is CTLE in Serdes System

Nov 19, 2025

The article discusses the role of Continuous Time Linear Equalizers (CTLE) in Serializer/Deserializer (SerDes) systems, highlighting their importance in reconstructing distorted data streams at high speeds. CTLE is presented as a common equalization approach used in both transmitting and receiving circuits.

r/hardware

[Chips and Cheese] Qualcomm’s Snapdragon X2 Elite

Nov 19, 2025

The article discusses Qualcomm's Snapdragon X2 Elite, highlighting its advancements and features. It is part of Qualcomm's ongoing efforts to enhance mobile processing capabilities.

Vik's Newsletter

Executive Brief: An In-Depth Look at the Viability of X-rays as an Alternative to EUV Lithography (Discussion on the startup Substrate)

Nov 04, 2025

The article discusses the potential of X-ray lithography as a viable alternative to EUV lithography, particularly focusing on the startup Substrate's innovations in this area. It includes a video essay and a bullet point summary for further insights into the topic.

Chipstrat

Intel Q3 2025 Earnings: Doing Fine

Oct 24, 2025

Intel's Q3 2025 earnings report indicates progress in their 18A process technology and successful execution of their 14A strategy. However, the company continues to face challenges related to supply and demand dynamics in the semiconductor market.

3

AnySilicon

TSMC to Break Ground on 1.4nm “A14” Fab on November 5

Oct 21, 2025

TSMC is set to break ground on its new 1.4nm fabrication facility in Taichung, Taiwan, on November 5, 2025. This development is a significant step in TSMC's roadmap for next-generation logic technologies aimed at high-performance computing.

Fabricated Knowledge

Intel's One True Stakeholder is Here

Aug 15, 2025

The article discusses the potential transformation of Intel with government support, highlighting the role of public investment in shaping its future. It suggests that such assistance could redefine Intel's position in the semiconductor landscape.

SemiAnalysis

Intel 18A Details & Cost, Future of DRAM 4F2 vs 3D, Backside Power Adoption (or Not), China's FlipFET, Digital Twins from Atoms to Fabs, and More

Jul 21, 2025

The article discusses Intel's advancements in its 18A process technology, the competitive landscape of DRAM with the transition from 4F2 to 3D architectures, and the implications of emerging technologies like FlipFET in China. It also touches on the potential of digital twins in semiconductor manufacturing, from atomic levels to full fabs.

Fabricated Knowledge

Software Follow Up

Jul 15, 2025

The author suggests a need to refine their thesis regarding the semiconductor industry, indicating a level of confidence in their predictions. The phrase 'net cope' implies a critical perspective on current industry narratives.

Chipstrat

Intel’s 18A: Misstep or First Step?

Jul 10, 2025

The article discusses Intel's 18A process technology, highlighting its innovations like RibbonFET and PowerVia while comparing its potential impact to TSMC's advancements. It also touches on Intel's challenges, including a recent write-off reported by Reuters.

Angstronomics

PS5 Refresh: Oberon Plus

Sep 25, 2022

The article discusses the PS5 refresh, referred to as Oberon Plus, which will utilize a 6nm EUV process node. This shrink in manufacturing technology is expected to enhance performance and efficiency.

134

Angstronomics

Ryzen 7000 Desktop Preview

Aug 29, 2022

The article discusses the increased transistor count and advancements in microarchitecture for AMD's Ryzen 7000 desktop processors. These enhancements are expected to improve performance and efficiency significantly.

Browse

Hot Topics

From Silos to Systems, From Data to Insight: Keysight’s Upcoming Webinar on EDA Data Transformation

Why chip design needs industrial-grade EDA AI

Rapidus to start construction on 1.4nm fab in 2027 — research and development on node to begin next year

Faster Bug Discovery And Coverage Closure

The Panther stalks: Intel’s Panther Lake CPUs set to take off in Oregon, company reveals, and cutting-edge 18A process is on track

How to layout correctly ?

Microsoft unveils Azure Cobalt 200 CPU, in-house chip targets higher performance and deeper integration — Arm-based chip is equipped with 132 cores and manufactured using TSMC's 3nm process

Intel is "All In On 14A"

What is CTLE in Serdes System

[Chips and Cheese] Qualcomm’s Snapdragon X2 Elite

Executive Brief: An In-Depth Look at the Viability of X-rays as an Alternative to EUV Lithography (Discussion on the startup Substrate)

Intel Q3 2025 Earnings: Doing Fine

TSMC to Break Ground on 1.4nm “A14” Fab on November 5

Intel's One True Stakeholder is Here

Intel 18A Details & Cost, Future of DRAM 4F2 vs 3D, Backside Power Adoption (or Not), China's FlipFET, Digital Twins from Atoms to Fabs, and More

Software Follow Up

Intel’s 18A: Misstep or First Step?

PS5 Refresh: Oberon Plus

Ryzen 7000 Desktop Preview