SK Hynix is making a significant investment of $13 billion in a new HBM packaging plant, positioning itself as a leader in the AI memory market. This move is indicative of the company's strategy to redefine its role in the memory sector.
SST and UMC have successfully qualified SST's embedded SuperFlash Gen 4 (ESF4) memory for automotive applications, achieving automotive-grade 1 (AG1) certification. Production is set to commence using UMC's advanced 28HPC+ foundry process technology.
The article discusses the challenges AI training faces, particularly in transferring large datasets between memory and processors. This issue highlights the increasing demand for efficient memory solutions in AI applications.
Micron Technology has signed a Letter of Intent to acquire Powerchip Semiconductor Manufacturing Corporation's P5 fabrication site in Taiwan. This acquisition is part of Micron's strategy to enhance its manufacturing capabilities in the region.
Samsung plans to increase its DRAM production by only 5% to 4 million wafers this year, according to reports from DigiTimes. This modest growth contrasts with broader expectations for the DRAM industry to expand production significantly.
OpenACM is introduced as the first open-source compiler designed for SRAM-based approximate Digital Compute-in-Memory (DCiM) architectures, addressing the challenges posed by the memory wall in data-intensive AI workloads. It enables designers to optimize energy consumption through accuracy-configurable multipliers, facilitating fine-grained accuracy-energy trade-offs.
Macronix's CEO Miin Wu discussed the company's range of nonvolatile memory solutions, particularly eMMC flash memory, during CES 2026. The conversation highlighted the enduring relevance of these technologies across various markets.
The Mostek MK4116 and MK4164 DRAM chips were pivotal in shaping the microcomputer landscape of the late 1970s and early 1980s. Their introduction established industry standards that influenced subsequent DRAM designs.
Global semiconductor revenues are projected to surpass $1 trillion in 2026, driven by significant growth in memory and logic IC revenues. This surge is attributed to massive demand across various sectors.
The article discusses the unique challenges of Large Language Model (LLM) inference, particularly focusing on memory and interconnect issues rather than compute power. It proposes four architectural research opportunities to enhance memory capacity and communication speed in datacenter AI applications.
Penguin Solutions has announced that its SMART Modular CXL NV-CMM E3.S 2T non-volatile memory module has achieved CXL compliance. This milestone underscores the company's commitment to adhering to industry standards in advanced memory solutions.
Cadence Design Systems has launched the first LPDDR5X 9,600 Mbits/s memory IP system solution designed for enterprise and data center applications. This solution integrates Cadence's memory IP with Microsoft's RAIDDR ECC algorithm to enhance reliability.
The article discusses the increasing importance of GDDR7 memory in enhancing memory throughput and efficiency for AI inference applications. It highlights a shift in focus from solely raw compute power to the overall performance of memory systems.
The article discusses the growing interest in Processing in Memory (PIM) technologies, which have been around for over 60 years. It aims to provide an annotated bibliography to support a forthcoming article on the subject.
The article discusses the potential of stacking high-bandwidth memory (HBM) directly on top of GPUs to enhance performance by reducing the energy and delay associated with data transfer. This innovation could significantly alleviate the bottleneck currently faced in AI computing.
The article highlights a significant endorsement for Resistive RAM (ReRAM) from industry leaders Texas Instruments and Onsemi. This support suggests that ReRAM technology may become a viable alternative to traditional flash memory.
The article provides an update on SRAM bandwidth calculations, highlighting the evolving requirements for inference tasks in the context of high bandwidth memory (HBM). It emphasizes the importance of accurate bandwidth metrics for optimizing SRAM performance in modern applications.
The adoption of hybrid bonding in HBM4 has been delayed due to process cost and yield issues, leading to a continued reliance on microbumps. This decision reflects ongoing challenges in advancing packaging technologies within the semiconductor industry.
HBM4 memory technology is highlighted at CES 2026, with aspirations to enhance capabilities in AI applications. The focus on HBM4 indicates a significant evolution in high-bandwidth memory solutions.
The article discusses the limitations of SRAM in AI inference, arguing it is not the ultimate solution many expect. It also emphasizes the continued relevance of HBM in the semiconductor landscape.